Understanding the Cell Microprocessor
by Anand Lal Shimpi on March 17, 2005 12:05 AM EST- Posted in
- CPUs
Final Words
Concluding anything about Cell requires a multifaceted look at the architecture and the platform as a whole.First from the perspective of the game industry, more specifically Playstation 3:
Cell’s architecture is similar to the next version of Microsoft’s Xbox and upcoming PC microprocessors in that it is heavily multithreaded. The next Xbox will execute between 3 and 6 threads simultaneously, while desktop PC microprocessors will execute between 2 - 4. The problem is that while Xbox 2/360/Next and the PC will be using multiple general purpose cores, Cell relies on more specialized hardware to achieve its peak performance. Cell’s SPEs being Altivec/VMX derived is a benefit, which should mean that the ISA is more familiar to developers working on any POWER based architecture, but the approach to development on Cell vs. development on the PC will literally be on opposite ends of the spectrum, with the new Xbox somewhere in between.
The problem here is that big game development houses often develop and optimize for the least common denominator when it comes to hardware, and offer ports with minor improvements to other platforms. Given Cell’s architecture, it hardly looks like a suitable “base” platform to develop for. We’d venture to say that a game developed for and ported from the PC or Xbox Next would be under-utilizing Cell’s performance potential unless significant code re-write time was spent.
Console-only development houses, especially those with close ties to Sony, may find themselves able to harness the power of Cell much more efficiently than developers who ascribe to the write-once, port-many process of cross-platform development. Given EA’s recent acquisition and licensing-spree, this is a very valid concern.
With Cell, Sony has effectively traded hardware complexity for programmer burden, but if anyone is willing to bear the burden of a complicated architecture, it is a game developer. The problem grows in complexity once you start factoring in porting to multiple platforms in a timely manner while still attempting to achieve maximum performance.
As a potential contender in the PC market, Cell has a very tall ladder to climb before even remotely appearing on the AMD/Intel radars. The biggest strength that the x86 market has is backwards compatibility, which is the main thing that has kept alternative ISAs out of the PC business. Regardless of how much hype is drummed up around Cell, the processor is not immune to the same laws of other contenders in the x86 market - a compatible ISA is a must. And as Intel’s Justin Rattner put it, “if there are good ideas in that architecture, PC architecture is very valuable and it will move to incorporate those ideas.”
Once again, what’s most intriguing is the similarity, at a high level, of Intel’s far future multi-core designs to Cell today. The main difference is that while Intel’s Cell-like designs will be built on 32nm or smaller processes, Cell is being introduced at 90nm - meaning that Intel is envisioning many more complex cores on a single die than Cell. Intel can make that kind of migration to a Cell-like design because their microprocessors already have a very large user base. IBM, Sony and Toshiba can’t however - Cell must achieve a very large user base initially in order to be competitive down the road. Unfortunately, seeing a future for Cell far outside of Playstation 3 and Sony/Toshiba CE devices is difficult at best.
The first thing you have to keep in mind is that Cell’s architecture is nothing revolutionary, it’s been done before. TI’s MVP 320C8X is a multi-processor DSP that sounds a lot like Cell: http://focus.ti.com/docs/military/catalog/general/general.jhtml?templateId=5603&path=templatedata/cm/milgeneral/data/dsp_320c80&familyId=44. So, while Cell is the best mass-market attempt at a design approach that has been tried before, it doesn’t have history on its side for success beyond a limited number of applications.
Regardless of what gaming platform you’re talking about, Cell’s ability to offer an array of cores to handle sophisticated physics and AI processing is the future. AGEIA’s announcement of the PhysX PPU (and the fact that it’s been given the “thumbs up” by Ubisoft and Epic Games) lends further credibility to Cell’s feasibility as a high performance gaming CPU.
The need for more realistic physics environments and AI in games is no illusion; the question is will Intel’s forthcoming dual and multi-core CPUs (with further optimized SIMD units) offer enough parallelism and performance for game developers, or will the PPU bring Cell-like architecture to the desktop PC well ahead of schedule? The answer to that question could very well shape the future of desktop PCs even more so than the advent of the GPU.
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faboloso112 - Thursday, March 17, 2005 - link
ahh i love bedtime stories!great read...VERY informative!
ksherman - Thursday, March 17, 2005 - link
sweet article! way over my head, but there were some parts that were dropped down to my level of understanding. Leave it to anand to tell the real story. It will be interesting to see how willing some companies will be to accomidate Sony's ratical processor... bu tas long as theirs money... Do you think that it is possible to (down the road) flop a x86 chip in place of the PPE? wouldn't hat make the Cell compatible with the current processing standards?ProviaFan - Thursday, March 17, 2005 - link
Describing this as a "sit down read" type of article makes me want to print it out to put it in the magazine rack, because I don't have a laptop + 802.11g to peruse AnandTech while I'm, er... ;)xsilver - Thursday, March 17, 2005 - link
nice, definitley one of those "sit down reads".... some serious shiznit ;)cosmotic - Thursday, March 17, 2005 - link
OMG! FIRST POST LOL ROFL LMAO OMG!!! LOOK WHOS COOL!!!Fricardo - Thursday, March 17, 2005 - link
Finally! Thanks guys.Bawl - Saturday, January 25, 2014 - link
I just love this deep analysis of one of the most mist-understanding processor of the last decade.Too bad that after spending more than a half-of-billion dollars, SonyThoshibaIBM didn't release the presumably outstanding CellTwo.
Ferrx - Sunday, December 20, 2015 - link
Hi, can you help me to understand this ? I don't understand at all about these._______ _________ ______
|Decode| | Execute | | Write |
----------- ---------------- -----------
| I1 | I2 | | | | | | | |
| I3 | I4 | | I1 | I2 | | | | |
| I3 | I4 | | I1 | | | | I2 | |
| | I4 | | | | | | I1 | I3 |
| I5 | I6 | | | | I4 | | I4 | |
| | I6 | | | I5 | | | I5 | |
| | | | | I6 | | | I6 | |
_______ _________ ______
In "Decode", each row has 2 columns. What do First and Second Column mean ?
same as "Write"
And in "Execute, each row has 3 columns. What do First, Second and Third column mean ?
And how is the process ? (The current table is about "In-Order Issue with Out-of-Order Completion").
I've read it many times, in the "Instruction Level Parallelism". But I still don't have any idea about it.
Ferrx - Sunday, December 20, 2015 - link
Hi, can you help me to understand this ? I don't understand at all about these._______ _________ ______
|Decode| | Execute | | Write |
----------- ---------------- -----------
| I1 | I2 | | | | | | | |
| I3 | I4 | | I1 | I2 | | | | |
| I3 | I4 | | I1 | | | | I2 | |
| | I4 | | | | | | I1 | I3 |
| I5 | I6 | | | | I4 | | I4 | |
| | I6 | | | I5 | | | I5 | |
| | | | | I6 | | | I6 | |
_______ _________ ______
In "Decode", each row has 2 columns. What do First and Second Column mean ?
same as "Write"
And in "Execute, each row has 3 columns. What do First, Second and Third column mean ?
And how is the process ? (The current table is about "In-Order Issue with Out-of-Order Completion").
I've read it many times, in the "Instruction Level Parallelism". But I still don't have any idea about it.
Ferrx - Sunday, December 20, 2015 - link
Aww... Can't do tab-'ing' 0__0